| A Fight Against Boredom, Deeper Understanding OCS | page 1 2
|
|---|
|
|---|
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
24 Jun 2012 22:35
| Okay like some of you already know i am a electronics nutcase.
For the heck of it let's rebuild the OCS using 7400 logic and keeping it to a bare minimum.
Yes i am aware not everything can be done in 7400 logic and in some cases like address decoding PALs make more sense.But anyhow for those interested, i'll make the kick off now.
Roughly 200 74HCT374 for register 16 bit wide.(of course not all 200 are required)
| |
Samuel D Crow
USA
| | (Natami Team)
Posts 1295
24 Jun 2012 22:49
| I don't have my 7400 logic data book with me but I think an interrupt controller could be used to determine the priority of pixels being fed by the sprites.
| |
Richard Maudsley
United Kingdom
| |
Posts 821
24 Jun 2012 23:12
| Isn't this just Lorraine? A tidied up replica of that would be pretty cool.
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 05:22
| Richard Maudsley wrote:
|
Isn't this just Lorraine?
A tidied up replica of that would be pretty cool.
|
;)
| |
Sascha B
Germany
| |
Posts 131
25 Jun 2012 10:57
| Actually there is more than 200 16Bit register required in OCS.
Blitter itself own some "shadow register" to hold data for next and out of former operation state.
To rebuild OCS a large amount of TTL is required.
The Lorraine Agnus boards was about 5 layer with "total chaos" of wireing at the backside ;)
Sure it would be totally awesome to see this table-filling construct show Workbench or the Boing-Ball demo :) But it may take some years and many skills to finish.
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 12:16
| Sascha to be honest your incorrect.
There are more then 200 byte size registers in OCS.
What i said a little less then 200 74HCT374 are required.
This is because i do not count the read only registers which do not need a d-latch to store information they just need a 74LS244 or 74LS245.(I am a fan tristate bus systems especialy when this is cheaper and increase the bus speed)Besides i thought i said minimal. ;) Okay the register the for some of the registers we need a fast counter like the 74ACT74 followed by a slower counter this is to coun the beam.
| |
Sascha B
Germany
| |
Posts 131
25 Jun 2012 15:12
| When I take a look at the Minimig RTL Schematics, I would not start doing this.
Anyway good luck and fun in building a TTL Amiga :)
| |
Richard Maudsley
United Kingdom
| |
Posts 821
25 Jun 2012 15:36
| Make sure you publish plans. I want to build a wardrobe sized Chaos Engine.
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 16:10
| Actually i am going to do this because i like doing this more then writing FPGA code. ;) Besides i am not alone, I am sure that i can draw Chuck T into this too. Besides that it would create some understanding in the community and all the engineers here would have something fun to read. Besides Sasha do you have a better way of doing it?
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 16:13
| Richard Maudsley wrote:
|
Make sure you publish plans. I want to build a wardrobe sized Chaos Engine.
|
Been there done that, Elektor had a great article about that last year.
| |
Richard Maudsley
United Kingdom
| |
Posts 821
25 Jun 2012 18:23
| ????
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 19:13
| take a look here EXTERNAL LINK
a chaos generator!
| |
Sascha B
Germany
| |
Posts 131
25 Jun 2012 21:29
| Marcel Verdaasdonk wrote:
|
Besides Sasha do you have a better way of doing it?
|
Yes, as already done in FPGA.
Sure its not the same fun/feeling as playing with TTL IC but the result is what counts. Actually Minimig and Natami would not exist without FPGA technology and I never would try to create an OCS or "whatever" computer chipset in raw TTL ;)Therefor good luck and much fun :)
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
25 Jun 2012 22:17
| Ah bah FPGA tech that is so simple, what is the thrill in that. :P I suppose Thomas finds in enjoyable but to me nothing beat the head beating one gets from doing TTL or even better conventional Diode wiring. :P
Well Sascha I want to do this to pass some time, which i could also spend on bashing people or worse trolling. I rather do something constructive wouldn't you agree that is better?
| |
Sascha B
Germany
| |
Posts 131
26 Jun 2012 08:51
| *grin* yes I see your point and share it in some way.
Even when I really do love the Minimig (core) construct to "look inside Amiga chipset" a real Amiga500 OCS board view still thrill me out ;)
FatAgnus and 64pin DIP 68000 got me since I first opened my Amiga500!
Your project plan has its appeal but in realistic ways it would take half a lifetime to see the Kickstart hand screen ;)
But for sure one REALLY know how any single signal works in OCS than.
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
26 Jun 2012 17:51
| Sascha all it takes are 2 commodore books and a good understanding of logic elements like the 4000 or 7400 families. The TRM A500/A2000, and the HRM revised edition 1989. With those two books one can deduct the functions of the OCS.
I haven't found good books that went into detail on AGA. I have some RAM for it already albeit on the slow side 100ns
hy53c256s10 if you want to know the specific type. anyone got a good idea on how to make the state engine in Paula?
| |
Sascha B
Germany
| |
Posts 131
26 Jun 2012 17:57
| Marcel Verdaasdonk wrote:
|
The TRM A500/A2000, and the HRM revised edition 1989.With those two books one can deduct the functions of the OCS.
|
This is only half or 3/4 true.
First UAE and Minimig releases was made out of AHRM info and has many bugs, mostly in Blitter and Sprite engine.
Only a very intense research/resting and comparing to real Amiga chipset hardware showed closer how it works. And there still is some things you can not find out by measurement the IC pins.
Blitter has internal operation steps without telling the outside, so no (or very hard) way to find out how it really works.
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
26 Jun 2012 18:17
| Sascha AFAIK the Amiga chipset is a static build which means it retains data no matter how slow it goes.
I could make the amiga go in single set mode if i am required to.
Hm, i suppose a Email to Dale Luck is a better idea since he has the Lorraine.
| |
Sascha B
Germany
| |
Posts 131
26 Jun 2012 18:23
| Hm, maybe we ware talking about 2 different things?
I was not talking about any clock speed.Anyway, have fun with the handicrafts project :)
| |
Marcel Verdaasdonk
Netherlands
| |
Posts 3976
26 Jun 2012 20:04
| Sascha I was high-lighting some research methods like single step clocking. what would interest me is a method of increasing the Address pointer registers without taking the up the bus. ;)
| |
|
Welcome to the Natami lounge.