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Asm Pro to Support the New 68050 CPUpage  1 2 3 4 
Rune Stensland
Norway
(MX-Board Owner)
Posts 871
19 Feb 2011 21:57


I just downloaded the Opensource Asm Pro sourcecode. I would like to add support for the new instructions and adressing modes in the 68050 CPU.

1. The program counter (PC) register can be used for writes.
2. Adress registers can be used as dataregisters.

etc.

In asmpro I plan to add a 68050 option wich will enable the new upcodes.

If you think this is needed I would like to join the Natami team.

contact me at

amigaguru (...) gmail.com

Team Chaos Leader
USA
(Moderator)
Posts 2094
19 Feb 2011 22:09


Have a look at this:
EXTERNAL LINK 
Merry xmas! :)

See if you can finish 050 support before Gunnar/Peter contacts you :)

Wojtek P
Poland

Posts 1597
19 Feb 2011 22:37


Team Chaos Leader wrote:

Have a look at this:
  EXTERNAL LINK 
  Merry xmas! :)
 
  See if you can finish 050 support before Gunnar/Peter contacts you :)

seems like only CALLM and RETM are unimplemented. Are such instructions used anywhere in amiga software?


André Jernung
Sweden
(MX-Board Owner)
Posts 988
19 Feb 2011 22:43


This instruction list is a bit outdated. We should nag Jens or Gunnar for a more recent one. :)

Team Chaos Leader
USA
(Moderator)
Posts 2094
19 Feb 2011 23:07


They didn't overwrite the old one with the new one?

Isn't that the version that Phil fixed up at least?

Phil "meynaf" G.
France
(Natami Team)
Posts 393
21 Feb 2011 09:13


Wojtek P wrote:

  seems like only CALLM and RETM are unimplemented. Are such instructions used anywhere in amiga software?

I'm using them to detect the presence of a '020 :p.

Only 68020 has them, so trapping as illegal opcode is fine (but nothing else).

Team Chaos Leader wrote:

They didn't overwrite the old one with the new one?
 
  Isn't that the version that Phil fixed up at least?

Even the fixed version is somehow outdated. Everything in that area is still in discussion and (nearly) nothing can be taken as granted.


Gabriele Budelacci
Italy

Posts 111
21 Feb 2011 09:43


Team Chaos Leader wrote:

Have a look at this:
  EXTERNAL LINK 
  Merry xmas! :)
 
  See if you can finish 050 support before Gunnar/Peter contacts you :)

Found a little typo error into the document:
64 bit DIVU and DIVS are wrong marked: 64*32 instead of 64/32

Cheers ;-)

Kamel Biskri
France

Posts 6
22 Feb 2011 12:12


AsmOne source code has also been released by the author of AsmPro IIRC its one of the first version so it's pure 68000.
 
  Kamel

Morgan Johansson
Sweden

Posts 99
22 Feb 2011 16:39


@S P: I wish you the best of luck! The Amiga needs a good and updated assembler and Asm-Pro is a good choice (however it has a few 020+ bugs that perhaps can be fixed aswell).


Thomas Richter
Germany
(MX-Board Owner)
Posts 1425
23 Feb 2011 04:41


Wojtek P wrote:

  seems like only CALLM and RETM are unimplemented. Are such instructions used anywhere in amiga software?

No. And they wouldn't be useful anyhow except for specialized operating system support. I guess Motorola also noticed.

Greetings,
Thomas


Rune Stensland
Norway
(MX-Board Owner)
Posts 871
21 Apr 2011 17:29


Ok PPL. I have started...
   
Screenshot:
   
EXTERNAL LINK 
I will implement support in the assembler and the disassembler. So we can compile Natami compatible EXE files. Before the Hardware is done..
:D

Gunnar von Boehn
Germany
(Moderator)
Posts 5775
21 Apr 2011 17:36


S P wrote:

Ok PPL. I have started...
     
  Screenshot:
     
  EXTERNAL LINK 
  I will implement support in the assembler and the disassembler. So we can compile Natami compatible EXE files. Before the Hardware is done..
  :D

Great work!!!!

André Jernung
Sweden
(MX-Board Owner)
Posts 988
21 Apr 2011 18:52


S P wrote:

Ok PPL. I have started...
     
  Screenshot:
     
  EXTERNAL LINK 
  I will implement support in the assembler and the disassembler. So we can compile Natami compatible EXE files. Before the Hardware is done..
  :D

Wow! You are my hero! :)


Chris Dennett
United Kingdom

Posts 135
22 Apr 2011 02:18


S P you are the man :)

Rune Stensland
Norway
(MX-Board Owner)
Posts 871
23 Apr 2011 20:14


Still working :D
  The dissassembled code is a mess so progress is slow....
 
  New feature today:
 
  - Enabled byte adress register access (except adda, suba, cmpa )
 
  move.b #1,a0
  move.b d0,a0
  move.b a1,a0
  move.b (a1),a0
  move.b (a0,d0.w),a0
  move.b (pc,d0.w),a0
  move.b 22(pc,d0.w),a0
  etc..
 
  The compiler generates the correct upcodes, but they are dissassembled as dc.w xxxx.
 
  Tonight I will add support in the Disassembler.

btw: I am also fixing bugs. If you want to report a bug just scream :D
In asmpro 1.17 this is not a valid instruction: tst 22(pc,d0.w)
but now it is :D

Rune Stensland
Norway
(MX-Board Owner)
Posts 871
23 Apr 2011 21:32


I finished the disassembler part:

Here is a screenshot:

EXTERNAL LINK 


Jakob Eriksson
Sweden
(Moderator)
Posts 1097
23 Apr 2011 21:38


Awesome! :-)

Rune Stensland
Norway
(MX-Board Owner)
Posts 871
23 Apr 2011 21:46


The previous screenshot was from the debugger:

Here is one from the disassembler:

EXTERNAL LINK 


Rune Stensland
Norway
(MX-Board Owner)
Posts 871
24 Apr 2011 11:35


Today I have added some more.. :

- N050: Enabled tst byte adress register (Assembler,dissassembler debuger)
- N050: Added clr.x ax, not.x ax,neg.x ax, negx.x ax (Assembler,dissassembler debuger)
- N050: Added bset.x #n,ax, bclr.x #n,ax, bchg.x #n,ax, btst #n,ax (Assembler,dissassembler debuger)

EXTERNAL LINK 

Rune Stensland
Norway
(MX-Board Owner)
Posts 871
24 Apr 2011 18:48


Working hard here now. (Easter Special)
 
  - N050: Added Full <EA> support for tst,clr,not,neg and negx  (ex. neg 10(pc,d0.w*2)) (Assembler,dissassembler,debugger)
  - N050: Added (B,W,L) ORIA , EORIA, ANDIA, ADDIA,SUBIA,CMPIA (Assembler,dissassembler,debugger)
 
  These upcodes are left('?' = I don't know what the instructions are supposed to do):
 
  FF1?
  FF1A?
  BKPT?
  ByteRevA?
  ByteRev?
  BitRev?
  mov3Q?
 
  DBCC.L
  BRA.B2
  bsr.B2
  bcc.b2
 
  mvs.b
  mvs.w
  mvz.b
  mvz.w
 
  I will contiue with The special branches now. (Odd adress branch=extra bit. Dbra.l
 
  Gunnar what is the bcc.b2 ? Goto +-256 ? instead of +-128 ?

Screenshot:

EXTERNAL LINK

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