;-)

Also the "toy maker" wasn't a small firm, Jeri's designs have been built my major manufacturers. Their decisions aren't personal like that, just based on what they think they'll earn.

The Toy company could have put the project on Kickstarter to have seperate individuals raise funds so the company didn't have to commit.  Once the design was a go, you pretty much have guaranteed sales.  It is a no brainer.

She has access to a lot more.  This is her gig:

EXTERNAL LINK  EXTERNAL LINK 
"Element14 is an arm of Newark, which is an arm of Premier-Farnell, one of the largest distributors in the world."

AJC, it was some public IRC, don't remember where it was.

But unfortunately the world is not that simple anymore. Single DRAM cells are not that much faster than 20 years ago. What makes DRAM fast is the ability to burst. Bursting means reading many, many ram cells at once and shifting them out of the chip serially. Problem is that you can only start reading when the read address is known. This basically means you need to know the read address in advance.

This creates a timely shift between the read data and the requested address. It does not matter if you are satisfied with the performance of the original Amiga design. But if you want to have more (or deeper) bitplanes, more resolution or faster ram access you need to take the burst capability into account. I learned that on the C-One prototype. I re-wrote most of the DMA machines according to that experience. The result for Natami is that the every DMA machine is a clockwork by its own, requesting memory content at the memory controller with has the only task of providing data to all of them. But the memory controller is not responsible for the internal cycle counter anymore.

So - out of curiosity I would surely die to get a look on the original schematics, to learn how they solved problems and implemented their design idea. But to track down bugs an Amiga 2000 can also used, like Marcel said.

You completely right about the bandwidth requirements and regular DRAM not sufficing that need.

I meant the 1987 technical manual for the A2000 since the PAL equation are included in it, and the clock is still written out fully in logic components.

And you are completely sure that you do not confuse access time with throughput? - The DDR2 RAM I am using for Natami has "only" a CAS latency of 4 because of the low operating frequency of 200MHz. And has a RAS latency of one or two. And a page needs to be closed for another one or two clocks. So if I add that up I come to about 25-35ns. And when I am the beholder and compare it to 50ns from 20 years ago then I would say, yes, it is faster, but not 15 times.

Or, what RAM do you have in mind? - I read about synchronous SRAM from ISSI which can be operated at 200MHz. I thought about that three or four years ago because with that the original Amiga RAM clockwork could be upheld. But as I heard the price I thought "ok, 2MB Chip RAM is enough".

And I found some very interesting power-point charts of their memory architecture. But I found no reference whether they actually consider building ram devices - not to speak of selling them.

So based on what I could figure out is that it might be worth to start a theoretical discussion. If somebody would like...

AFAIK they only sell IP for inclusion in ASICs :/
The best DRAM that's available is IMHO RLDRAM II but it's expensive.

Seems that we are stuck on technology and parts which we can buy.

Maybe with custom ASIC and total redesign it make sense.

It is now, I'm not arguing against it I just thought you had the wrong idea about the "toy company" being some kind of tiny one-man-operation.

Also back then kickstarter didn't exist. Now it'd punch through it's goal very quickly.