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SyZ Connector
Matthias Münch
Germany

Posts 4
09 Mar 2010 20:59


Hi there,

are there any dev docs available for the SyZ-Bus (Pinout, Connector-Type, recommend card size)? Thomas?

Cheers,
Matthias

Thomas Hirsch
Germany
(Natami Team Member)
Posts 233
11 Mar 2010 20:56


Sorry, not yet. But as soon as they are done the will appear on this site for download.

Matthias Münch
Germany

Posts 4
12 Mar 2010 17:51


Ok, I'll wait then. Thanks.

Marcel Verdaasdonk
Netherlands

Posts 2089
16 Mar 2010 13:09


Matthias, I think it would be easiest to use a small and fast FPGA anyhow in the design so that it's just a matter of firmware for the time being.
  Perhaps some local RAM for buffering, but that depends on the thing your specifications.

  What leave me to this question what is it your exactly planing to place on the bus, Matthias?

I think all what a designer currently needs on detailed data is the layout dimensions on the connectors, type, pin count.
That would be a nice start, means we can at least start a design.


Steve Thomas

Posts 92
16 Mar 2010 13:14


Will the SyZ bus be on the commercial board as well?

Marcel Verdaasdonk
Netherlands

Posts 2089
16 Mar 2010 13:30


It's highly likely that they won't drop this expansion bus.
So i hope that they will be available on all Natami boards.

Matthias Münch
Germany

Posts 4
16 Mar 2010 16:36


Marcel Verdaasdonk wrote:
What leave me to this question what is it your exactly planing to place on the bus, Matthias?

I haven't decided yet as I don't have a Natami and I am not sure what could be useful.

Thomas Hirsch
Germany
(Natami Team Member)
Posts 233
16 Mar 2010 16:52


Since the commercial board is supposed to carry the softcore CPU (the eval/dev can't at the current view) we thought about dropping the SyZ bus later on. But on the other hand the SyZ bus

The SyZ protocol is right now "just" an slightly adapted PCI agent interface. This is why I call it preliminary. But it works surprisingly well at 50-60MHz. I did not test it with higher clock rates. For the dev and eval boards (LX 16 layout) I expect the SyZ-Connector to be mandatory because (I guess, I did not try) that the softcore CPU won't fit into the FPGA. But also a fact is that having two expansion board systems PCI and SyZ might be an overloaded to the system. And furthermore from the FPGAs side of view PCI goes to the left and SyZ goes to the right.

For the future we might have two options:
1/ dropping SyZ in favor of PCI. All needed peripheral extensions are available on PCI (as PCI card or as protocol on a physical chip).

2/ dropping PCI and using only SyZ for expansion. PCI devices (physical PCI cards and/or single PCI chips) would need a SyZ-to-PCI bridge.

Both options have pros and cons. And since the other thread popped up regarding an A1200 replacement board the SyZ bus could be extended with the few signals I mentioned there. With tha and the NatAmi having SyZ connectors on the up and downside the NatAmi as a quite small PCB could be plugged into a much bigger I/O board which does not only contain all IOs from the A1200 but also a SyZ to PCI bridge. This would enable the CreditCard port having a 32bit cardbus interface and would provide the possibility to put (W)LAN and USB on the IO PCB as PCI components.

But at the moment I am just thinking about those possibilities. The next revision board will not be started until the current board is not fully functional.

Matthias Münch
Germany

Posts 4
16 Mar 2010 19:14


I think the idea of a stackable connector/bus isn't bad and shouldn't removed. You never know what you can do with it in the future. SO having both on the Natami could be funny.

Marcel Verdaasdonk
Netherlands

Posts 2089
16 Mar 2010 19:17


Thomas thank you for the information.

Okay, you might have a interesting idea, since your looking at a two board solution for the future.

But keep in mind you want a higher transfer rate then a PCI bus if your planning on hosting it.



Steve Thomas

Posts 92
16 Mar 2010 20:00


I think a stack of expansion cards would be unstable, unreliable and require a lot of height in the case, is the PCI bus not fast enough for I/O cards?

Thomas Hirsch
Germany
(Natami Team Member)
Posts 233
16 Mar 2010 20:09


Such a stack will be VERY stable, trust me. PCI on the other hand is 90 degrees and you need a rather complicated mechanical mounting system. And PCI is limited to 33MHz (the slowest component gives the speed limit, and surely there will be an 33MHz agent).

But on the other hand, we won't have the graphics card on the expansion bus (PCI or SyZ), so everything else will be fine with 33MHz.

Marcel Verdaasdonk
Netherlands

Posts 2089
16 Mar 2010 20:49


Steve you want more bandwidth then 266MB on 66Mhz.
this is because your hosting PCI card who work on that speed, if you have more then one and if they need the full bandwidth it's gonna hurt.

I personally would go for a interface that could go up to 400MHz so we have enough head room for the future.

PCI is limited, thus picking it as a host bus would hurt the system as a whole, although we have all these expansion cards.

Having a custom Bus gives the designer freedom in clock speed, protocol, bus width.

although a custom bus lacks other components that use it.



Marcel Verdaasdonk
Netherlands

Posts 2089
16 Mar 2010 21:08


Thomas Hirsch wrote:

  But on the other hand, we won't have the graphics card on the expansion bus (PCI or SyZ), so everything else will be fine with 33MHz.
 

 
  Don't under estimate USB 2.0 bandwidth requirements.(card)
  I can name a few PCI v2 Harddisk controllers too if you like.(card)
  Base 10 ethernet needs some speed too.(potential onboard)
  USB 1.1 need a little Bandwidth.(onboard)
 
  PCI v1 32bit can go up to 133MB
  PCI v2 32bit can go up to 266MB due to it's double clock speed of 66Mhz.
 
  You need more bandwidth then the PCI bus you support/host
 
  I think what i am getting at is the whole is more then the sum of it's parts or something like that.
 

Deep Sub Micron
Germany
(Natami Team Member)
Posts 352
17 Mar 2010 00:18


I like the idea of having SyZ on the commercial board in both directions. With that it could be possible to use the current dev board NatamiLX below as an IO plane. On top it might still be possible to add an real processor with a NAe60*
I know the planned commercial board contains the SuperAGA chipset. So it has a monitor output and the other monitor output on the NatamiLX board will become useless. That means it might be possible to do a partially populated version of the dev board for this purpose.

This will open many different future upgrade paths:
-Replacing or adding bigger commercial boards.
-Adding partially populated commercial boards for special purpose (for example only FPGA and RAM and a n070 design)
-other IO planes for fitting in different cases.
-New kind of IO plane with different IOs - someday maybe even SATA and PCIE (just dreaming)

Well we might not do any of these options but we could if we like.


Marcel Verdaasdonk
Netherlands

Posts 2089
22 Mar 2010 17:00


So, we would like a Bus that has.
Bus mastering, PnP, is hardware independent, be able to burst, DMA?

posts 16